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protected mode - traduction vers néerlandais

OPERATIONAL MODE OF X86-COMPATIBLE CENTRAL PROCESSING UNITS

Pmode; Protected Virtual Address Mode; Protected Mode; Protected virtual address mode; Protected-mode; 286 protected mode

protected mode

beschermde toestand, toestand van de prossecor waarin een aantal toepassingen samen kunnen werken zonder onderlinge tegenwerkingen

Dos Protected Mode Interface

API FOR MS-DOS ALLOWING PROGRAMS TO ACCESS PROTECTED MODE ON 386 (AND LATER) CPUS

DPMI Committee; DPMIXXX0; True DPMI; DPMI 0.9; DPMI 1.0; DOS API translation; DOS Protected Mode Interface 1.0; DOS Protected Mode Interface 0.9; DPMI client; DPMI server; DPMI host; Virtual DPMI host; Real DPMI host; DPMI kernel; DPMI 0.04; DOS Protected Mode Interface 0.04; DOS Protected Mode Interface Specification pre-release 0.04; MS-DOS Extensions for DPMI Hosts; DPMI DOS API; MS-DOS Extensions for DPMI Hosts Version Pre-Release 0.02; QDPMI$$$; MS-DOS extensions to the DPMI specification; DOS extensions to the DPMI specification; DPMI MS-DOS extensions; DPMI DOS extensions; MS-DOS extensions (DPMI); DOS extensions (DPMI); MS-DOS Extensions (DPMI); MSDPMI; DPMI.INI; Called interrupt 21 from protected mode; DPMI (DOS extender); Disk Operating System Protected Mode Interface

DOS besturing naar beveiligde toestand (waarbij een aantal programma's tegelijkertijd werkzaam kunnen zijn zonder elkaar te storen en elk programma een eigen geheugengebied heeft)

real mode

OPERATING MODE OF ALL X86-COMPATIBLE CPUS

Realmode; Real Mode; Real-address mode; Real address mode; True real mode; Real-mode

echte toestand, werk toestand van de hoofd prossecor waarin al de bronnen zijn toegewezen aan het programma dat in uitvoering is

Définition

protected mode

An operating mode of Intel 80x86 processors. The opposite of real mode. The Intel 8088, Intel 8086, Intel 80188 and Intel 80186 had only real mode, processors beginning with the Intel 80286 feature a second mode called protected mode. In real mode, addresses are generated by adding an address offset to the value of a segment register shifted left four bits. As the segment register and address offset are 16 bits long this results in a 20-bit address. This is the origin of the one megabyte (2^20) limit in real mode. There are 4 segment registers on processors before the {Intel 80386}. The 80386 introduced two more segment registers. Which segment register is used depends on the instruction, on the addressing mode and of an optional instruction prefix which selects the segment register explicitly. In protected mode, the segment registers contain an index into a table of segment descriptors. Each segment descriptor contains the start address of the segment, to which the offset is added to generate the address. In addition, the segment descriptor contains memory protection information. This includes an offset limit and bits for write and read permission. This allows the processor to prevent memory accesses to certain data. The operating system can use this to protect different processes' memory from each other, hence the name "protected mode". While the standard register set belongs to the CPU, the segment registers lie "at the boundary" between the CPU and MMU. Each time a new value is loaded into a segment register while in protected mode, the corresponding descriptor is loaded into a descriptor cache in the (Segment-)MMU. On processors before the Pentium this takes longer than just loading the segment register in real mode. Addresses generated by the CPU (which are segment offsets) are passed to the MMU to be checked against the limit in the segment descriptor and are there added to the segment base address in the descriptor to form a linear address. On a 80386 or later, the linear address is further processed by the paged MMU before the result (the physical address) appears on the chip's address pins. The 80286 doesn't have a paged MMU so the linear address is output directly as the physical address. The paged MMU allows for arbitrary remapping of four klilobyte memory blocks (pages) through a translation table stored in memory. A few entries of this table are cached in the MMU's Translation Lookaside Buffer to avoid excessive memory accesses. After processor reset, all processors start in real mode. Protected mode has to be enabled by software. On the 80286 there exists no documented way back to real mode apart from resetting the processor. Later processors allow switching back to real mode by software. Software which has been written or compiled to run in protected mode must only use segment register values given to it by the operating system. Unfortunately, most application code for MS-DOS, written before the 286, will fail in protected mode because it assumes real mode addressing and writes arbitrary values to segment registers, e.g. in order to perform address calculations. Such use of segment registers is only really necessary with data structures that are larger than 64 kilobytes and thus don't fit into a single segment. This is usually dealt with by the huge memory model in compilers. In this model, compilers generate address arithmetic involving segment registers. A solution which is portable to protected mode with almost the same efficiency would involve using a table of segments instead of calculating new segment register values ad hoc. To ease the transition to protected mode, Intel 80386 and later processors provide "virtual 86 mode". (1995-03-29)

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Wikipédia

Protected mode

In computing, protected mode, also called protected virtual address mode, is an operational mode of x86-compatible central processing units (CPUs). It allows system software to use features such as virtual memory, paging and safe multi-tasking designed to increase an operating system's control over application software.

When a processor that supports x86 protected mode is powered on, it begins executing instructions in real mode, in order to maintain backward compatibility with earlier x86 processors. Protected mode may only be entered after the system software sets up one descriptor table and enables the Protection Enable (PE) bit in the control register 0 (CR0).

Protected mode was first added to the x86 architecture in 1982, with the release of Intel's 80286 (286) processor, and later extended with the release of the 80386 (386) in 1985. Due to the enhancements added by protected mode, it has become widely adopted and has become the foundation for all subsequent enhancements to the x86 architecture, although many of those enhancements, such as added instructions and new registers, also brought benefits to the real mode.

https://en.wikipedia.org/wiki/Protected mode

Exemples du corpus de texte pour protected mode

1. A version shipping with Vista computers, due out for consumers early next year, will come with parental controls and a "protected mode" so hackers can‘t easily to gain access to the rest of the machine even if the browser is hit.